Tech Tip
382
Networking Fundamentals
Direct Memory
Access (DMA)
channel
a circuit that allows
devices to communi-
cate and transfer data
to and from RAM
without the need of
CPU intervention.
IRQ to communicate with the CPU. If two hardware devices are assigned the
same IRQ, an IRQ confl ict occurs. Once the fi rst device contacts the CPU using the
IRQ assignment, the other device cannot communicate with the CPU. An IRQ confl ict
can lead to problems such as an inoperable device, a system crash, and a system
lockup. An IRQ can typically be assigned manually by fi rst entering the BIOS setup
program and disabling Plug and Play detection. Changes to the IRQ can then be
made through Device Manager. After the problem device has been assigned the
proper IRQ, the Plug and Play detection can be activated without a problem.
You may notice IRQ numbers higher than 16 in Device Manager. These numbers
are virtual IRQ settings, rather than hardware-based IRQs. They work the same as the
hardware-based interrupts, but they are not limited by physical properties. Virtual
IRQ assignments are confi gured automatically by the operating system.
Yellow question marks next to devices in Device Manager indicate there is a problem with
the device or assignment.
Direct Memory Access (DMA) Channel
A Direct Memory Access (DMA) channel is a circuit that allows devices
to communicate and transfer data to and from RAM without the need of CPU
intervention. Computer systems were fi rst designed with the CPU handling
all communication. Every bit of data had to travel through the CPU. DMA
technology was introduced to save valuable processor time.
DMA works in conjunction with the chipsets on the motherboard, BIOS
software, and the CPU. Large blocks of data that need to be transferred between
hardware devices and memory are transferred through a DMA channel that
is assigned to the device. Figure 9-15 shows the DMA controller identifi ed by
Device Manager.
One of the devices controlled by the DMA memory access controller is the
computer ATA drive. Figure 9-16 shows the
Advanced Settings
tab for the IDE
channel. The IDE channel has been assigned to a DMA channel to take advantage
of fast data transfer.
Figure 9-14.
IRQ assignments.