112 Programmable Logic Controllers: Hardware and Programming
Figure 6-17 displays the input/output connections of the Allen-
Bradley modular SLC 503 PLC device described in the previous para-
graphs. Table 6-2 illustrates the input/output ports’ assignments.
Figure 6-18 shows the PLC ladder diagram for the relay logic dia-
gram displayed in Figure 6-13.
6.5 PLC Program Scan Time
When the processor runs through the PLC, the PLC program
execution flow, called program scan, on each rung is from left to right.
Moving through the entire PLC ladder logic diagram, the program
scan is from the top rung to the bottom rung. The operational scan
rate is the time required to execute the PLC ladder diagram once.
Therefore, instructions in the PLC ladder logic diagram are scanned
starting from the instruction in the upper-left corner and ending with
the instruction on the lower-right corner. After the last instruction in
the lower-right corner is executed, the process of scanning restarts.
Single-bit instructions in PLC ladder logic diagrams are displayed
in Table 6-3. Single-bit instructions examine if closed (XIC) and
examine if open (XIO) have the same meaning as NO and NC respec-
tively. Output energize (OTE) represents the output port that is con-
nected to an output device. Output latch (OTL) and output unlatch
(OTU) are used for latch/unlatch instructions and are covered in this
chapter. One-shot rising (OSR) is a one-shot output instruction used
to generate a one-shot pulse.
Figure 6-16. Select the 1746-O*16 output module with sixteen
120 VAC output ports.