284 Programmable Logic Controllers: Hardware and Programming
scan. Figure 13-11 displays the schematic diagram of a BSR instruc-
tion for the Allen-Bradley SLC 500 series PLC.
Whenever the input pushbutton in rung 0001 is pressed, the data
bits in file B3:0 are shifted to the right. This means that the pushbut-
ton must be pressed to energize the BSR instruction. The length of
the data bit file shown in Figure 13-11 is six. Therefore, for each low-
to-high input, bits B3/5, B3/4, B3/3, B3/2, B3/1, and B3/0 are shifted
to the right once. The last bit (B3/0) exits and reenters at the bit on the
beginning of the length (B3/5). This is done by placing the unload bit
(R6:1/UL) in (B3:0/5).
The done coil in control register (R6:1/DN) is energized when the
instruction has shifted the bits six times. Similar to the bit shift left
instruction, the reset (RES) instruction in rung 0003 resets the bit shift
right instruction to position zero. Example 13-3 illustrates how to use
the BSR instruction in PLC ladder logic diagrams.
0000
0001
0002
0003
0004
I:1
0
End
MOV
Move
Source 43690
AAAAh
Dest #B3:0
32
Move
I:1
2
Reset
R6:1
I:1
1
BSR
Bit shift right
File #B3:0
Control R6:1
Bit address B3:0/5
Length 6
PB
EN
DN
RES
R6:1
UL
B3:0
5
Bit Shift Right (BSR) Instruction
Figure 13-11. Bit shift right (BSR) instruction for the Allen-Bradley SLC 500 PLC.